Design of a Low-Cost Passive UHF RFID tag in 0.18um CMOS technology

The work addresses the design of a passive UHF Radio-Frequency Identification (RFID) tag. In order to realize a product able to be competitive in the RFID expanding market, a cost reduction policy has been applied in the design: a general purpose digital technology has been employed, resorting to specific techniques in order to overcome the limitations due to the lack of process options. Such solutions are accurately described, and every block composing the transponder analog frontend is analyzed, highlighting advantages and disadvantages of the proposed architectures with respect to the ones present in literature. The circuits theory is validated through simulations and experimental data.Il lavoro di tesi è imperniato sul progetto di un tag passivo per l'Identificazione a Radio-Frequenza (RFID) operante nelle bande UHF. Per il progetto è stata applicata una politica di riduzione dei costi, così da proporre un prodotto in grado di essere competitivo nel fiorente mercato dell'RFID: è stata scelta una tecnologia digitale general-purpose, e specifiche tecniche di progettazione sono state utilizzate per superare le limitazioni dovute alla scarsità di opzioni di processo. Le soluzioni adottate sono descritte accuratamente, ed è riportata l'analisi di ogni singolo blocco componente il frontend analogico, evidenziando vantaggi e svantaggi delle architetture proposte rispetto a quelle presenti in letteratura. La validità della teoria alla base dei circuiti è stata verificata tramite simulazioni e dati sperimentali

Multi-function ESD protection circuit for UHF RFID devices in CMOS technology

The design and implementation of an electrostatic discharge protection suitable for UHF RFID devices in CMOS technology is presented. The circuit implements three fundamental functions for the RF interface: power limiting, backscatter modulation and electrostatic discharge protection. Since all functions are achieved by the same MOS device the additional shunt capacitance at the RF inputs is limited. Therefore the maximum reading distance of the RFID device is improved without sacrificing the electrostatic protection level

Ultra low-voltage analog circuits for UHF RFID devicesin 180 nm CMOS technology

Radio-frequency identification by means of passive tags requires low-cost devices featuring extremely low power consumption for long reading distance and compatibility to small printed antennas. The paper describes the design and implementation of the key analog blocks in a RFID chip: power supply regulator, local oscillator and ASK demodulator. The proposed local oscillator exhibits a very low power consumption and achieves a frequency tolerance compatible with the requirements dictated by the ISO 18000-6 standards. In addition, an ultra-low power voltage reference and a regulator based on a zero-voltage threshold device are presented. These circuits are suitable to provide a regulated power supply to the local oscillator and to the core logic of the passive device. Measurements on a chip implemented in 0.18 μm digital CMOS technology validate the results obtained from simulations